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Quick List - All Products
QUICK LIST OF PRODUCTS
Easy to use soft IP modules and tools that are all FULLY supported in Qsys for SUPERIOR RESULTS
1. AES INLINE ENCRYPTION FOR HIGH RISK OFF-CHIP FLASH
A simple, easy to use, very cheap, low circuit area, security solution to encrypt data and code that is: A) at rest in the off-chip FLASH, and B) inflight to and from the soft or hard processors. Makes storage and execution of code from large cheap off-chip flash, and storage of client data in flash, FAR safer. Protects your proprietary IP and customer data in the FLASH, as well as the safe operation of the device against malicious re-programming. Combine with products 2 or 3 and achieve encryption security with FASTER software performance!
2. TINY MULTI-USE SYSTEM CACHE MODULE (CMS-T003)
Employ to accelerate software or a bus-master peripheral, and/ or as a 'non-burst to burst' convertor. Requires only 50 to 100 LE.
A tiny 2-way set associative SYSTEM cache for use with the Nios II/e or a bus-master peripheral when accessing flash or SDRAM, to VERY strongly accelerate (E.G. UP TO 69x) software performance. Makes storage and execution of code from large cheap off-chip flash FAR more viable. Can also be employed as an Avalon non burst to burst converter to accelerate flash or SDRAM access. Also an ideal replacement for Altera’s Nios II/f flash accelerator for Cyclone, Arria and Stratix projects, for far superior results.
3. VERY SMALL MULTI-USE SYSTEM CACHE MODULE (CMS-T002)
Employ to accelerate software or multiple bus-master peripherals. Requires from only 276 LE.
A very small fully-associative SYSTEM cache for use as a L1 cache for Nios II/e or as a L2 cache for Nios II/f. Cache multiple bus-master peripherals. Suitable for flash or SDRAM. Makes storage and execution of code from large cheap off-chip flash FAR more viable. Also an ideal replacement for Altera’s Nios II/f flash accelerator for Cyclone, Arria and Stratix projects, for far superior results. Also gives better results for programs like Linux, and less worse case behaviour.
4. ON-CHIP FLASH ACCELERATOR (CMS-T001)
Easily replaces the Altera Nios II/f flash accelerator on all Altera MAX 10 FPGA to achieve up to 4x faster performance with the lowest combinatorial logic overhead. Requires only 35 LE.
5. SRAM MODULE WITH INBUILT BURST CONVERTER (SRAM-T001)
Easily enables highly granular, high-clock speed, on-chip memory instantiation in Qsys. Can save up to 50% of SRAM (M9K, M10K, M20K) resources in every instantiation, up to 44% higher clock speeds and up to 3.5x less circuit area when compared to using Altera’s on-chip memory IP.
6. AVALON INTERCONNECT SOLUTIONS (coming soon)
Easily reduce circuit area and win higher clock speeds with these Altera Avalon protocol interconnect technologies. For use with Qsys in general purpose applications.
7. TINY MMU/MPU SOLUTIONS (coming soon)
Highly innovative, high-performance, tiny circuit area, MMU/MPU's (e.g. ~50 LE with 1 clock cycle CONSTANT timing). Suitable for Nios II/economy, Nios II/fast and bus master peripherals.
ALL PRODUCTS ARE FULLY SUPPORTED IN QSYS, and COME WITH STEP BY STEP TUTORIALS. NO SPECIAL FPGA DESIGNER SKILLS OR TOOLS ARE NEEDED. Request Free Trials in the blue CONTACT tab above.
All these products form part of a multi-year R&D effort to create highly innovative HIGH PERFORMANCE safety critical and mixed-criticality solutions that can be easily exploited in both FPGA and/or ASIC.
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Thursday, July 28, 2016


altera max 10 fpga 2NEW SOFT IP modules that offer unique capabilities 
For far superior results in Intel's Altera devices

FOR NEW DESIGN STARTS, LATE STAGE PROJECTS, AND RETRO-FITS IN DEPLOYED PRODUCTS AND SYSTEMS

No special skills, no special tools are needed  Fully supported in Qsys for rapid integration
You can quickly perform 'before-and-after' measurements to prove superior results    All ITAR-free  
No changes to Altera IP or 3rd party IP   No changes to existing software or boot loaders   
Clear tutorials are provided


Innovation
created out of a multi-year R&D effort in collaboration with industry and Altera (now the INTEL Programmable Solutions Group).  AVAILABLE FOR FREE TRIALS NOW  Contact your Altera sales representative or field application engineer, or simply use the Contact form QUICK LIST OF ALL PRODUCTS


Product list by key functionality - All fully supported in QSYS 

All soft IP modules are 'universal', and suitable for most Altera device families (unless specifically noted).  All modules are highly viable for NEW projects, and open the door for exciting RETRO-FIT opportunities, because of low licence fees and low chip resource demands.  QUICK LIST OF ALL PRODUCTS in blue tab at right ->.

Product SMEM-T001

A very small high performance COTS AES ENCRYPTION MODULE for FPGA FLASH

Every FPGA that employs off-chip flash should employ encryption to deliver a base-line of protection to this most highly vulnerable attack vector in FPGA's.  THIS PRODUCT IS A WIN/WIN/WIN for designers, suppliers and end-users. 

FPGA Designers:  Why expend all the effort, time and cost to create a new design, and then deploy it with zero protection against it being monitored and copied from FLASH in minutes, when for $1k per year you can employ AES protection?
FPGA Product and System Suppliers: Why sell a solution with unprotected FLASH to your loyal customer, when AES security can be included at practically zero extra cost, to help prevent unauthorised (malicious or accidental) re-programming of the FLASH in the field?
Buyers and End-Users:
 Why accept any FPGA-based product or system that does not include a basic base-line of AES to protect the highly vulnerable FLASH, when it can be included at almost zero cost?  This includes protection of application code, data (including any customer data) residing in and in flight to and from the FLASH. Without AES protection any FPGA based product or system that employs FLASH becomes a weak link in your overall security chain.

"Programmable (FPGA) devices are designed to be monitored and re-programmed in the field.  This makes them a logical target for hacking.  Every FPGA should be deployed with a base-line of encryption security, in the same way that desktops, mobile devices and even $1 online transactions are protected.  Synaptic Labs' product protects the most exposed low cost attack vector in most FPGA's i.e. data and code at rest, and in flight to and from, the off-chip flash.  Use this product to achieve a base-line of security, to protect what is currently a weak link in many commercial and industrial security chains."  Brian Snow former Technical Director, NSA.

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Make Cheap Off-Chip FLASH More Viable and Useful In Your Design 

"Off-Chip FLASH is cheap and available in large sizes. Our system accelerators (CMS-T002 or T003) very strongly increase software performance when running from off-chip FLASH (e.g. on the Nios II/e core by up to 69x). This means your project could be enhanced by being able to exploit off-chip FLASH more. Licence for $1k per year"

Product SRAM-T001: 
On-Chip Memory Allocation With Inbuilt Burst Converter

"Every FPGA project that needs to allocate SRAM can employ this simple product to make your design work so much easier, and can save up to 50% of SRAM in every instantiation, WITH up to 44% higher clock speeds, AND save up to 3.5x LESS circuit area, AND with other benefits including greater flexibility, less contention and easier to achieve static timing across your entire design. Licence for $1k per year"

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Years of completed cross-domain research has resulted in innovation in every product.  
That includes extensive and iterative consultation with key players in all levels of the relevant industrial verticals.    
This multi-year process has resulted in products that are easy to use and that simply work as claimed.

Accelerating Bus-Master Peripherals That Access Memory 
(CMS-T002/T003)

"Every FPGA project with bus-master peripherals that access one or more types of memory can employ either of these simple (multi-use) products to accelerate performance and reduce contention across your design, to make your design work so much easier, and your product better.  Licence for $1k per year"

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Significantly Accelerate Software On The Nios II/fast Core: 
(CMS-T001/T002/T003)

"Software performance on the Nios II/f from SDRAM, on-chip and off-chip flash can be easily accelerated by any of these 3 products, with numerous other benefits.  Licence for $1k per year"

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Easily achieve MORE in your project:

  • Increase software and bus-master peripherals performance
  • Reduce design complexity and effort
  • Save time and money
  • Add more security to protect your IP, customer loyalty, safety
  • Save SRAM
  • Save circuit area
  • ..... and more

Accelerating Software On The Small Nios II/economy Core Up To 69x: 
(CMS-T002/T003)

"The Nios II/e is the smallest Altera core, suitable for the smallest devices, and easily included in larger devices for running some code separately.  Either of these two system accelerator products (CMS-T002 or T003) will accelerate software from SDRAM, on-chip and off-chip flash.  Licence for $1k per year"

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"These products will make many design projects easier and more commercially viable."


"It will be ALWAYS be helpful to have these new solutions in your designers tool kit
To explore NEW design and configuration OPTIONS and ENHANCEMENTS 
To easily IMPROVE your project and SIMPLIFY implementation
------
OR to UPGRADE your existing products (retro-fit)"


Key features of all solutions

 

Chip designers:  You will be pleased that it is so simple and viable to exploit these new solutions.  
All at very low cost
 - to benefit you and your customers - in past, current and future projects.

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